counter code

Digital Electronics (Electrical Engineering) - MCQs


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Q1.
A divide by 6 counter is obtained using
  • A. 6 bit ripple counter
  • B. 6 bit ring counter
  • C. 3 bit twisted ring counter
  • D. both c and d

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Q2.
Specification of a synchronous sequential machine is given by its
  • A. initial state
  • B. final state
  • C. stable state
  • D. state table

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Q3.
A sequence circuit does not use clock pulses. It is
  • A. an asynchronous sequential CRT
  • B. a synchronous equal CRT
  • C. a counter
  • D. a shift counter

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Q4.
An synchronous sequential circuit is
  • A. a combinational circuit with feedback
  • B. a combinational circuit without feedback
  • C. one that uses a clock
  • D. none of the above

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Q5.
Which of the following counter results in least delay?
  • A. ring counter
  • B. ripple counter
  • C. synchronous counter
  • D. asynchronous counter

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Q6.
The number of flip flops required in a decade counter is
  • A. 2
  • B. 3
  • C. 4
  • D. 10

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